Computer Engineering student at the University of Arkansas with a Cybersecurity concentration. Building secure systems, full-stack applications, and embedded hardware — graduating May 2026.
I'm a Computer Engineering student at the University of Arkansas (graduating May 2026) with a concentration in Cybersecurity. I was recently nominated as a Senior of Significance 2026 — an honor recognizing standout graduating seniors selected by the College of Engineering.
My work spans full-stack web development, embedded systems design in Verilog, and applied cybersecurity. My senior capstone, PhishWise, is a phishing-awareness training platform I'm currently building to help users recognize social engineering attacks.
Beyond the classroom, I co-founded the DogsToHogs mentorship program for Springdale High School students, serve as a Senior Student Ambassador delivering engineering tours, and lead the Summer Camp Committee building 250+ hours of STEM curriculum.
I'm a proud first-gen college student, fluent in English with novice Spanish, and passionate about lifting others into STEM through mentorship and outreach.
A web-based phishing awareness platform that delivers simulated phishing emails and evaluates user responses. Designed adaptive, feedback-driven learning modules to train users in recognizing social engineering indicators. Built with modular, extensible components supporting user tracking, session management, and future expansion.
A hardened Ubuntu Server environment built from scratch — SSH key auth, UFW firewall, Fail2Ban, NGINX over self-signed TLS, Docker, and Ansible. The setup itself was straightforward. The interesting part was what broke along the way.
Full-stack multiplayer simulation with real-time client–server communication over UDP. Implemented real-time score tracking, game timers, team assignments, and a retro arcade-themed interface with audio. Collaborated in a 5-sprint Agile workflow using Trello and Slack.
Designed a 16-bit microcontroller from scratch in Verilog with an ALU supporting arithmetic and logic instructions, a Program Counter, FSM control logic, Instruction Register, Memory Address/Data Registers, and I/O ports. Verified through ModelSim simulation and Synopsys Design Vision synthesis with timing constraints.
I'm graduating in May 2026 and actively exploring full-time opportunities in software engineering, cybersecurity, and computer engineering roles.
If you're interested in working together, have a question, or just want to connect — feel free to reach out through any of the channels below.